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» Analytical Modeling of Pipeline Parallelism
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IEEEPACT
2009
IEEE
13 years 11 months ago
Analytical Modeling of Pipeline Parallelism
Parallel programming is a requirement in the multi-core era. One of the most promising techniques to make parallel programming available for the general users is the use of parall...
Angeles G. Navarro, Rafael Asenjo, Siham Tabik, Ca...
HPCA
1995
IEEE
13 years 8 months ago
The Effects of STEF in Finely Parallel Multithreaded Processors
The throughput of a multiple-pipelined processor suffers due to lack of sufficient instructions to make multiple pipelines busy and due to delays associated with pipeline depende...
Yamin Li, Wanming Chu
IPPS
2009
IEEE
13 years 11 months ago
Predictive analysis and optimisation of pipelined wavefront computations
Pipelined wavefront computations are a ubiquitous class of parallel algorithm used for the solution of a num­ ber of scientific and engineering applications. This paper investig...
Gihan R. Mudalige, Simon D. Hammond, J. A. Smith, ...
DATE
2005
IEEE
143views Hardware» more  DATE 2005»
13 years 6 months ago
Statistical Modeling of Pipeline Delay and Design of Pipeline under Process Variation to Enhance Yield in sub-100nm Technologies
Operating frequency of a pipelined circuit is determined by the delay of the slowest pipeline stage. However, under statistical delay variation in sub-100nm technology regime, the...
Animesh Datta, Swarup Bhunia, Saibal Mukhopadhyay,...
ISCA
2002
IEEE
127views Hardware» more  ISCA 2002»
13 years 9 months ago
The Optimum Pipeline Depth for a Microprocessor
The impact of pipeline length on the performance of a microprocessor is explored both theoretically and by simulation. An analytical theory is presented that shows two opposing ar...
Allan Hartstein, Thomas R. Puzak