26 search results - page 2 / 6 » Analyzing Specifications for Delay-Insensitive Circuits |
ASYNC
1999
IEEE
13 years 9 months ago
1999
IEEE
Noise immunity is becomingone of the most important design parameters for deep-sub-micron (DSM) technologies. Asynchronous circuits seem to be a good candidate to alleviate the pr...
KDD
1995
ACM
13 years 8 months ago
1995
ACM
Discovering repetitive, interesting, and functional substructures in a structural database improves the ability to interpret and compress the data. However, scientists working wit...
ICCAD
1999
IEEE
13 years 9 months ago
1999
IEEE
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
UAI
1996
13 years 6 months ago
1996
In this paper we propose a family of algorithms combining treeclustering with conditioning that trade space for time. Such algorithms are useful for reasoning in probabilistic and...
DATE
2006
IEEE
13 years 11 months ago
2006
IEEE
Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...