Sciweavers

52 search results - page 1 / 11
» Analyzing the impact of process variations on parametric mea...
Sort
View
DATE
2009
IEEE
167views Hardware» more  DATE 2009»
13 years 11 months ago
Analyzing the impact of process variations on parametric measurements: Novel models and applications
Abstract—In this paper we propose a novel statistical framework to model the impact of process variations on semiconductor circuits through the use of process sensitive test stru...
Sherief Reda, Sani R. Nassif
CORR
2007
Springer
95views Education» more  CORR 2007»
13 years 4 months ago
Parametric Yield Analysis of Mems via Statistical Methods
This paper considers a developing theory on the effects of inevitable process variations during the fabrication of MEMS and other microsystems. The effects on the performance and ...
Shyam Praveen Vudathu, Kishore K. Duganapalli, Rai...
DAC
2009
ACM
14 years 5 months ago
Analysis and mitigation of process variation impacts on Power-Attack Tolerance
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...
Lang Lin, Wayne P. Burleson
IOLTS
2005
IEEE
141views Hardware» more  IOLTS 2005»
13 years 10 months ago
A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy
ISQED
2008
IEEE
103views Hardware» more  ISQED 2008»
13 years 11 months ago
Process Variation Characterization and Modeling of Nanoparticle Interconnects for Foldable Electronics
— Designers require variational information for robust designs. Characterization of such information can be costly for the novel nanoparticle interconnect process, which utilize ...
Rasit Onur Topaloglu