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» Antisymmetries in the realization of Boolean functions
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ISCAS
2002
IEEE
116views Hardware» more  ISCAS 2002»
14 years 3 months ago
Antisymmetries in the realization of Boolean functions
New symmetries of degree two are introduced, along with spectral techniques for identifying these symmetries. Some applications of these symmetries are discussed, in particular th...
Jacqueline E. Rice, Jon C. Muzio
CCCG
2010
14 years 6 days ago
Any monotone boolean function can be realized by interlocked polygons
We show how to construct interlocked collections of simple polygons in the plane that fall apart upon removing certain combinations of pieces. Precisely, interiordisjoint simple p...
Erik D. Demaine, Martin L. Demaine, Ryuhei Uehara
ASPDAC
2007
ACM
80views Hardware» more  ASPDAC 2007»
14 years 2 months ago
Recognition of Fanout-free Functions
Factoring is a logic minimization technique to represent a Boolean function in an equivalent function with minimum literals. When realizing the circuit, a function represented in ...
Tsung-Lin Lee, Chun-Yao Wang
VLSID
2002
IEEE
81views VLSI» more  VLSID 2002»
14 years 3 months ago
A New Synthesis of Symmetric Functions
A new approach to synthesizing totally symmetric Boolean functions is presented. First, a novel cellular array is introduced for synthesizing unate symmetric functions. Using this...
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattac...
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
14 years 4 months ago
Using conjugate symmetries to enhance gate-level simulations
State machine based simulation of Boolean functions is substantially faster if the function being simulated is symmetric. Unfortunately function symmetries are comparatively rare....
Peter M. Maurer