6 search results - page 1 / 2 » Architectural Concurrency Equivalence with Chaotic Models |
MOMPES
2008
IEEE
13 years 11 months ago
2008
IEEE
During its lifetime, embedded systems go through multiple changes to their runtime architecture. That is, threads, processes, and processor are added or removed to/from the softwa...
WEBDB
2010
Springer
13 years 9 months ago
2010
Springer
We introduce and study concurrent One-Way Protocols in social networks. The model is motivated by the rise of online social networks and the fast development of automation feature...
CAV
2012
Springer
11 years 7 months ago
2012
Springer
The growing complexity of hardware optimizations employed by multiprocessors leads to subtle distinctions among allowed and disallowed behaviors, posing challenges in specifying th...
CONCUR
2008
Springer
13 years 6 months ago
2008
Springer
Software transactional memory (STM) offers a disciplined concurrent programming model for exploiting the parallelism of modern processor architectures. This paper presents the firs...
HPCA
2006
IEEE
14 years 5 months ago
2006
IEEE
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...