7 search results - page 1 / 2 » Architectural Modifications to Improve Floating-Point Unit E... |
FPL
2006
Springer
13 years 8 months ago
2006
Springer
FPGAs have reached densities that can implement floatingpoint applications, but floating-point operations still require a large amount of FPGA resources. One major component of IE...
TVLSI
2008
13 years 4 months ago
2008
With the density of FPGAs steadily increasing, FPGAs have reached the point where they are capable of implementing complex floating-point applications. However, their general-purpo...
FCCM
2003
IEEE
13 years 9 months ago
2003
IEEE
Most commercial and academic floating point libraries for FPGAs provide only a small fraction of all possible floating point units. In contrast, the floating point unit generat...
FCCM
2009
IEEE
13 years 11 months ago
2009
IEEE
This paper will describe the architecture of a compiler which will convert an untimed C description of a set of floating point expressions into a synthesizable datapath optimized ...
ERSA
2004
13 years 5 months ago
2004
In this paper, we propose an architecture for floatingpoint based LU decomposition for large-sized matrices. Our proposed architecture is based on the well known concept of blocki...