113 search results - page 2 / 23 » Architectural-Level Fault Tolerant Computation in Nanoelectr... |
ETS
2006
IEEE
13 years 8 months ago
2006
IEEE
Online repair through reconfiguration is a particularly advantageous approach in the nanoelectronic environment since reconfigurability is naturally supported by the devices. Howe...
SC
2005
ACM
13 years 10 months ago
2005
ACM
As device scales shrink, higher transistor counts are available while soft-errors, even in logic, become a major concern. A new class of architectures, such as Merrimac and the IB...
Publication
In this paper, we propose a task scheduling algorithm for a multicore processor system which reduces the recovery time in case of a single fail-stop failure of a multicore processo...
Presentation
In this paper, we propose a task scheduling al-gorithm for a multicore processor system which reduces the recovery time in case of a single fail-stop failure of a multicore process...
EDCC
2006
Springer
13 years 8 months ago
2006
Springer
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...