18 search results - page 2 / 4 » Architecture Analysis for Low-Delay Video Coding |
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
— Multiview video coding (MVC) systems require much more bandwidth and computational complexity relative to mono-view video systems. Thus, when designing a VLSI architecture for ...
ICIP
2006
IEEE
14 years 7 months ago
2006
IEEE
In the past few years, a number of practical video coding schemes following distributed source coding principles have emerged. One of the main goals of distributed video coding (D...
ICIP
2000
IEEE
14 years 6 months ago
2000
IEEE
VIRAM (Vector Intelligent Random Access Memory) is a vector architecture processor with embedded memory, designed for portable multimedia processing devices. Its vector processing...
TCSV
2002
13 years 5 months ago
2002
This paper presents an efficient VLSI architecture design of MPEG-4 shape coding, which is the key technology for supporting the content-based functionality of the MPEG-4 Video sta...
DAC
2006
ACM
13 years 11 months ago
2006
ACM
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...