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» Area estimation and optimisation of FPGA routing fabrics
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DATE
2007
IEEE
150views Hardware» more  DATE 2007»
13 years 12 months ago
Assessing carbon nanotube bundle interconnect for future FPGA architectures
Field Programmable Gate Arrays (FPGAs) are important hardware platforms in various applications due to increasing design complexity and mask costs. However, as CMOS process techno...
Soumya Eachempati, Arthur Nieuwoudt, Aman Gayasen,...
DATE
2002
IEEE
206views Hardware» more  DATE 2002»
13 years 10 months ago
Accurate Area and Delay Estimators for FPGAs
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
Anshuman Nayak, Malay Haldar, Alok N. Choudhary, P...
FPGA
2005
ACM
95views FPGA» more  FPGA 2005»
13 years 11 months ago
The Stratix II logic and routing architecture
This paper describes the Altera Stratix II™ logic and routing architecture. This architecture features a novel adaptive logic module (ALM) that is based on a 6-LUT, but can be p...
David M. Lewis, Elias Ahmed, Gregg Baeckler, Vaugh...
FPL
2007
Springer
178views Hardware» more  FPL 2007»
13 years 11 months ago
Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support
This paper introduces a software supported methodology for exploring/evaluating 3D FPGA architectures. Two new CAD tools are developed: (i) the 3DPRO for placement and routing on ...
Kostas Siozios, Kostas Sotiriadis, Vasilis F. Pavl...
SLIP
2006
ACM
13 years 11 months ago
The routability of multiprocessor network topologies in FPGAs
A fundamental difference between ASICs and FPGAs is that wires in ASICs are designed such that it matches the requirements of a particular design. Wire parameters such as: length...
Manuel Saldaña, Lesley Shannon, Paul Chow