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» Area-minimal algorithm for LUT-based FPGA technology mapping...
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ICCAD
2004
IEEE
150views Hardware» more  ICCAD 2004»
14 years 1 months ago
Hermes: LUT FPGA technology mapping algorithm for area minimization with optimum depth
— This paper presents Hermes, a depth-optimal LUT based FPGA mapping algorithm. The presented algorithm is based on a new strategy for finding LUTs allowing to find a good LUT ...
Maxim Teslenko, Elena Dubrova
DAC
1993
ACM
13 years 9 months ago
On Area/Depth Trade-off in LUT-Based FPGA Technology Mapping
In this paper we study the area and depth trade-off in LUT based FPGA technology mapping. Starting from a depth-optimal mapping solution, we perform a number of depth relaxation o...
Jason Cong, Yuzheng Ding