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JNSM
2008
130views more  JNSM 2008»
13 years 5 months ago
Declarative Infrastructure Configuration Synthesis and Debugging
There is a large conceptual gap between end-to-end infrastructure requirements and detailed component configuration implementing those requirements. Today, this gap is manually br...
Sanjai Narain, Gary Levin, Sharad Malik, Vikram Ka...
ICTAI
2008
IEEE
13 years 11 months ago
Haplotype Inference with Boolean Constraint Solving: An Overview
Boolean satisfiability (SAT) finds a wide range of practical applications, including Artificial Intelligence and, more recently, Bioinformatics. Although encoding some combinat...
Inês Lynce, Ana Graça, João Ma...
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
13 years 9 months ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
CADE
2004
Springer
14 years 5 months ago
The ICS Decision Procedures for Embedded Deduction
contexts such as construction of abstractions, speed may be favored over completeness, so that undecidable theories (e.g., nonlinear integer arithmetic) and those whose decision pr...
Leonardo Mendonça de Moura, Sam Owre, Haral...
SAT
2010
Springer
174views Hardware» more  SAT 2010»
13 years 3 months ago
A System for Solving Constraint Satisfaction Problems with SMT
Abstract. SAT Modulo Theories (SMT) consists of deciding the satisfiability of a formula with respect to a decidable background theory, such as linear integer arithmetic, bit-vect...
Miquel Bofill, Josep Suy, Mateu Villaret