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» Aspects of Formal and Graphical Design of a Bus System
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ISCAS
2003
IEEE
135views Hardware» more  ISCAS 2003»
13 years 11 months ago
Formal verification of LTL formulas for SystemC designs
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
Daniel Große, Rolf Drechsler
FMCAD
2006
Springer
13 years 9 months ago
Design for Verification of the PCI-X Bus
The importance of re-usable Intellectual Properties (IPs) cores is increasing due to the growing complexity of today's system-on-chip and the need for rapid prototyping. In th...
Haja Moinudeen, Ali Habibi, Sofiène Tahar
FASE
1999
Springer
13 years 10 months ago
JTN: A Java-Targeted Graphic Formal Notation for Reactive and Concurrent Systems
JTN is a formal graphic notation for Java-targeted design speci cations, that are speci cations of systems that will be implemented using Java. JTN is aimed to be a part of a more ...
Eva Coscia, Gianna Reggio
OOPSLA
2004
Springer
13 years 11 months ago
C-SAW and genAWeave: a two-level aspect weaving toolsuite
This demonstration will feature overviews of the C-SAW and GenAWeave projects. The first half of the presentation will introduce the concept of two-level aspect weaving, which uni...
Jeffrey G. Gray, Jing Zhang, Suman Roychoudhury, I...
WOTUG
2007
13 years 7 months ago
Modeling and Analysis of the AMBA Bus Using CSP and B
Abstract. In this paper, we present a formal model and analysis of the AMBA Advanced High-performance Bus (AHB) on-chip bus. The model is given in CSP B—an integration of the pro...
Alistair A. McEwan, Steve Schneider