The widespread adoption of embedded microprocessor-based systems for safety critical applications mandates the use of co-design tools able to evaluate system dependability at ever...
In this demo paper we present the prototype of our fault injection testbed generator. Our tool empowers engineers to generate emulated SOA environments and to program fault injecti...
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
In the near future, hardware is expected to become increasingly vulnerable to faults due to continuously decreasing feature size. Software-level symptoms have previously been used...
The use of formal model based (FMB) methods to evaluate the quality of the components is an important research area. Except for a growing number of exceptions, FMB methods are sti...
Hye Yeon Kim, Kshamta Jerath, Frederick T. Sheldon