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ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 2 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
DAGSTUHL
2007
13 years 6 months ago
Some Experiments on Tiling Loop Programs for Shared-Memory Multicore Architectures
The model-based transformation of loop programs is a way of detecting fine-grained parallelism in sequential programs. One of the challenges is to agglomerate the parallelism to a...
Armin Größlinger
PC
2006
124views Management» more  PC 2006»
13 years 4 months ago
Message-passing code generation for non-rectangular tiling transformations
Tiling is a well known loop transformation used to reduce communication overhead in distributed memory machines. Although a lot of theoretical research has been done concerning th...
Georgios I. Goumas, Nikolaos Drosinos, Maria Athan...
PPOPP
2009
ACM
14 years 5 months ago
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
Muthu Manikandan Baskaran, Nagavijayalakshmi Vydya...
IPPS
1999
IEEE
13 years 9 months ago
Hyperplane Partitioning: An Approach to Global Data Partitioning for Distributed Memory Machines
Automatic Global Data Partitioning for Distributed Memory Machines DMMs is a di cult problem. In this work, we present a partitioning strategy called 'Hyperplane Partitioning...
S. R. Prakash, Y. N. Srikant