365 search results - page 73 / 73 » Automatic Performance Debugging of SPMD Parallel Programs |
DAC
2008
ACM
13 years 6 months ago
2008
ACM
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
ICS
2001
Tsinghua U.
13 years 9 months ago
2001
Tsinghua U.
At Rice University, we have undertaken a project to construct a framework for generating high-level problem solving languages that can achieve high performance on a variety of pla...
ASPLOS
2010
ACM
13 years 11 months ago
2010
ACM
Growing transistor counts, limited power budgets, and the breakdown of voltage scaling are currently conspiring to create a utilization wall that limits the fraction of a chip tha...
EGH
2010
Springer
13 years 3 months ago
2010
Springer
While a number of different shading languages have been developed, their efficient integration into an existing renderer is notoriously difficult, often boiling down to implementi...
ICPP
2002
IEEE
13 years 10 months ago
2002
IEEE
A software cache implements instruction and data caching entirely in software. Dynamic binary rewriting offers a means to specialize the software cache miss checks at cache miss t...