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DATE
2000
IEEE
132views Hardware» more  DATE 2000»
11 years 4 months ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
ATS
2003
IEEE
98views Hardware» more  ATS 2003»
11 years 5 months ago
Automatic Design Validation Framework for HDL Descriptions via RTL ATPG
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
Liang Zhang, Michael S. Hsiao, Indradeep Ghosh
ICST
2008
IEEE
11 years 6 months ago
Designing and Building a Software Test Organization
–Abstract for conference - preliminary Model-Based Testing: Models for Test Cases Jan Tretmans, Embedded Systems Institute, Eindhoven : Systematic testing of software plays an im...
Bruce Benton
RSP
2003
IEEE
117views Control Systems» more  RSP 2003»
11 years 5 months ago
Prototype-Based Tests for Hybrid Reactive Systems
Model-based testing relies on the use of behavior models to automatically generate sequences of inputs and expected outputs. These sequences can be used as test cases to the end o...
Gabor Hahn, Jan Philipps, Alexander Pretschner, Th...
ASPDAC
2009
ACM
262views Hardware» more  ASPDAC 2009»
11 years 6 months ago
Fault modeling and testing of retention flip-flops in low power designs
Low power circuits have become a necessary part in modern designs. Retention flip-flop is one of the most important components in low power designs. Conventional test methodologie...
Bing-Chuan Bai, Augusli Kifli, Chien-Mo James Li, ...
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