70 search results - page 1 / 14 » Automatic creation of tile size selection models |
CGO
2010
IEEE
13 years 11 months ago
2010
IEEE
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
EUROPAR
2011
Springer
12 years 4 months ago
2011
Springer
DOALL loops are tiled to exploit DOALL parallelism and data locality on GPUs. In contrast, due to loop-carried dependences, DOACROSS loops must be skewed first in order to make ti...
ICS
2009
Tsinghua U.
13 years 11 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
ECCV
1998
Springer
14 years 6 months ago
1998
Springer
In this contribution, we are concerned with the detection and re ned localization of 3D point landmarks. We propose multi-step di erential procedures for subvoxel localization of 3...
APCCM
2009
13 years 5 months ago
2009
In the design of multimedia systems, one of the important issues is how to deal with "Kansei" of human beings. The concept of "Kansei" in Japanese includes sev...