14 search results - page 1 / 3 » Automatic generation of FPGA routing architectures from high... |
FPGA
2000
ACM
13 years 8 months ago
2000
ACM
In this paper we present a "high-level" FPGA architecture description language which lets FPGA architects succinctly and quickly describe an FPGA routing architecture. W...
FPL
2001
Springer
13 years 8 months ago
2001
Springer
This paper presents the benefits of using a generic FPGA tool set developed at the university of Brest for programming virtual FPGA structures. From a high level FPGA description,...
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...
FPGA
2003
ACM
13 years 9 months ago
2003
ACM
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
CASES
2007
ACM
13 years 8 months ago
2007
ACM
With increasing complexity of modern embedded systems, the availability of highly optimizing compilers becomes more and more important. At the same time, application specific inst...