4 search results - page 1 / 1 » Automatic instruction scheduler retargeting by reverse-engin... |
PLDI
2006
ACM
13 years 10 months ago
2006
ACM
In order to generate high-quality code for modern processors, a compiler must aggressively schedule instructions, maximizing resource utilization for execution efficiency. For a ...
ICCAD
1994
IEEE
13 years 8 months ago
1994
IEEE
Abstract-- The design of application-specific instruction set processor (ASIP) system includes at least three interdependent tasks: microarchitecture design, instruction set design...
CODES
1999
IEEE
13 years 8 months ago
1999
IEEE
This paper introduces a flexible code generation framework dedicated to the design of application specific programmable processors. This tool allows the user to build specific com...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
The capability of performing architectural exploration has become essential for embedded microprocessor design in System-On-Chip. While many retargetable instruction set (ISA) sim...