702 search results - page 1 / 141 » Automatic network generation for system-on-chip communicatio... |
DAC
2001
ACM
14 years 5 months ago
2001
ACM
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
VLSID
2002
IEEE
14 years 4 months ago
2002
IEEE
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
FDL
2005
IEEE
13 years 10 months ago
2005
IEEE
Although Moore’s Law enables a huge number of components to be integrated into a single chip, design methods that will allow system architects to put the components together to ...
DATE
2003
IEEE
13 years 9 months ago
2003
IEEE
This paper presents the SPIN micro-network that is a generic, scalable interconnect architecture for system on chip. The SPIN architecture relies on packet switching and point-to-...
SLIP
2006
ACM
13 years 10 months ago
2006
ACM
— The increasing gap between design productivity and chip complexity and the emerging Systems-On-Chip (SOC) architectural template have led to the wide utilization of reusable ha...