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DATE
2000
IEEE
132views Hardware» more  DATE 2000»
10 years 7 months ago
Automatic Test Bench Generation for Validation of RT-Level Descriptions: An Industrial Experience
In current microprocessors and systems, an increasingly high silicon portion is derived through automatic synthesis, with designers working exclusively at the RT-level, and design...
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squill...
CODES
2000
IEEE
10 years 7 months ago
Automatic test bench generation for simulation-based validation
In current design practice synthesis tools play a key role, letting designers to concentrate on the specificationof the system being designed by carrying out repetitive tasks such...
Marcello Lajolo, Luciano Lavagno, Maurizio Rebaude...
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
11 years 3 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...
HASE
2007
IEEE
10 years 6 months ago
Model Validation using Automatically Generated Requirements-Based Tests
In current model-based development practice, validation that we are building a correct model is achieved by manually deriving requirements-based test cases for model testing. Mode...
Ajitha Rajan, Michael W. Whalen, Mats Per Erik Hei...
VL
2008
IEEE
115views Visual Languages» more  VL 2008»
10 years 9 months ago
Flexible visualization of automatic simulation based on structured graph transformation
Visual modeling languages for discrete behavior modeling allow the modeler to describe how systems develop over time during system runs. Models of these languages are the basis fo...
Enrico Biermann, Claudia Ermel, Jonas Hurrelmann, ...
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