Sciweavers

4 search results - page 1 / 1
» Automating the design of an asynchronous DLX microprocessor
Sort
View
DAC
2003
ACM
13 years 10 months ago
Automating the design of an asynchronous DLX microprocessor
Manish Amde, Ivan Blunno, Christos P. Sotiriou
ASYNC
2004
IEEE
90views Hardware» more  ASYNC 2004»
13 years 8 months ago
Handshake Protocols for De-Synchronization
De-synchronization appears as a new paradigm to automate the design of asynchronous circuits from synchronous netlists. This paper studies different protocols for de-synchronizatio...
Ivan Blunno, Jordi Cortadella, Alex Kondratyev, Lu...
DAC
2001
ACM
14 years 5 months ago
Automated Pipeline Design
The interlock and forwarding logic is considered the tricky part of a fully-featured pipelined microprocessor and especially debugging these parts delays the hardware design proce...
Daniel Kroening, Wolfgang J. Paul
DSD
2009
IEEE
88views Hardware» more  DSD 2009»
13 years 2 months ago
A Synthesisable Quasi-Delay Insensitive Result Forwarding Unit for an Asynchronous Processor
Abstract--The implementation of an efficient result forwarding unit for asynchronous processors faces the problem of the inherent lack of synchronisation between result producer an...
Luis A. Tarazona, Doug A. Edwards, Luis A. Plana