42 search results - page 1 / 9 » Balancing Performance and Reliability in the Memory Hierarch... |
ISPASS
2005
IEEE
13 years 10 months ago
2005
IEEE
Cosmic-ray induced soft errors in cache memories are becoming a major threat to the reliability of microprocessor-based systems. In this paper, we present a new method to accurate...
SAC
2006
ACM
13 years 10 months ago
2006
ACM
This paper describes an algorithm that allows Linux to perform multilevel load balancing in NUMA computers. The Linux scheduler implements a load balancing algorithm that uses str...
ASPLOS
2010
ACM
13 years 11 months ago
2010
ACM
DRAM is facing severe scalability challenges in sub-45nm technology nodes due to precise charge placement and sensing hurdles in deep-submicron geometries. Resistive memories, suc...
DAC
2006
ACM
14 years 5 months ago
2006
ACM
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
SAC
2004
ACM
13 years 10 months ago
2004
ACM
Web cache replacement algorithms have received a lot of attention during the past years. Though none of the proposed algorithms deals efficiently with all the particularities of t...