117 search results - page 2 / 24 » Balancing power consumption in multiprocessor systems |
ICPP
2003
IEEE
13 years 9 months ago
2003
IEEE
In chip-multiprocessors (CMPs), the number of cores and the issue width of each core presents an important design trade-off to balance the amount of TLP and ILP between multi-thre...
CODES
2002
IEEE
13 years 9 months ago
2002
IEEE
High-speed serial network interfaces are gaining wide use in connecting multiple processors and peripherals in modern embedded systems, thanks to their size advantage and power ef...
DATE
2009
IEEE
13 years 8 months ago
2009
IEEE
As application complexity increases, modern embedded systems have adopted heterogeneous processing elements to enhance the computing capability or to reduce the power consumption. ...
CODES
2007
IEEE
13 years 11 months ago
2007
IEEE
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
ICON
2007
IEEE
13 years 10 months ago
2007
IEEE
- In this paper we analyze the performance, utilization, and power estimation of server systems by both adopting the batch service and adjusting the batch size. In addition to redu...