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» Barrier Slicing and Chopping
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AICT
2005
IEEE
102views Communications» more  AICT 2005»
13 years 11 months ago
An Overlay Data Plane for PlanetLab
PlanetLab has significantly lowered the barriers to deploying overlays. This paper describes how to lower them further by introducing a general data plane for overlay networks. R...
Andy C. Bavier, Mark Huang, Larry L. Peterson
ASPDAC
1999
ACM
112views Hardware» more  ASPDAC 1999»
13 years 10 months ago
Relaxed Simulated Tempering for VLSI Floorplan Designs
In the past two decades, the simulated annealing technique has been considered as a powerful approach to handle many NP-hard optimization problems in VLSI designs. Recently, a new...
Jason Cong, Tianming Kong, Dongmin Xu, Faming Lian...