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ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
13 years 10 months ago
Interconnect-Aware Coherence Protocols for Chip Multiprocessors
Improvements in semiconductor technology have made it possible to include multiple processor cores on a single die. Chip Multi-Processors (CMP) are an attractive choice for future...
Liqun Cheng, Naveen Muralimanohar, Karthik Ramani,...
EMSOFT
2007
Springer
13 years 11 months ago
Scheduling multiple independent hard-real-time jobs on a heterogeneous multiprocessor
This paper proposes a scheduling strategy and an automatic scheduling flow that enable the simultaneous execution of multiple hard-real-time dataflow jobs. Each job has its own ...
Orlando Moreira, Frederico Valente, Marco Bekooij
INTEGRATION
2008
183views more  INTEGRATION 2008»
13 years 4 months ago
Network-on-Chip design and synthesis outlook
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
David Atienza, Federico Angiolini, Srinivasan Mura...
DAC
1996
ACM
13 years 9 months ago
Constructing Application-Specific Heterogeneous Embedded Architectures from Custom HW/SW Applications
Deep sub-micron processing technologies have enabled the implementation of new application-specificembeddedarchitecturesthat integrate multiple software programmable processors (e...
Steven Vercauteren, Bill Lin, Hugo De Man
PDP
2010
IEEE
13 years 9 months ago
Energy-Efficient Hardware Prefetching for CMPs Using Heterogeneous Interconnects
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Antonio Flores, Juan L. Aragón, Manuel E. A...