Sciweavers

6 search results - page 2 / 2
» Bit-Width Selection for Data-Path Implementations
Sort
View
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
13 years 9 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan