3 search results - page 1 / 1 » Bit-level optimization for high-level synthesis and FPGA-bas... |
FCCM
2011
IEEE
12 years 8 months ago
2011
IEEE
—The problem of automatically generating hardware modules from a high level representation of an application has been at the research forefront in the last few years. In this pap...
SASP
2008
IEEE
13 years 11 months ago
2008
IEEE
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
FPL
2003
Springer
13 years 10 months ago
2003
Springer
Abstract. Hardware realization of kernel loops holds the promise of accelerating the overall application performance and is therefore an important part of the synthesis process. In...