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» Bridging fault testability of BDD circuits
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ASPDAC
2005
ACM
142views Hardware» more  ASPDAC 2005»
13 years 6 months ago
Bridging fault testability of BDD circuits
Abstract— In this paper we study the testability of circuits derived from Binary Decision Diagrams (BDDs) under the bridging fault model. It is shown that testability can be form...
Junhao Shi, Görschwin Fey, Rolf Drechsler
ATS
2003
IEEE
151views Hardware» more  ATS 2003»
13 years 9 months ago
BDD Based Synthesis of Symmetric Functions with Full Path-Delay Fault Testability
A new technique for synthesizing totally symmetric Boolean functions is presented that achieves complete robust path delay fault testability. We apply BDDs for the synthesis of sy...
Junhao Shi, Görschwin Fey, Rolf Drechsler
VTS
2003
IEEE
131views Hardware» more  VTS 2003»
13 years 9 months ago
Efficient Implication - Based Untestable Bridge Fault Identifier
: This paper presents a novel, low cost technique based on implications to identify untestable bridging faults in sequential circuits. Sequential symbolic simulation [1] is first p...
Manan Syal, Michael S. Hsiao, Kiran B. Doreswamy, ...
DATE
2008
IEEE
124views Hardware» more  DATE 2008»
13 years 10 months ago
Automated Testability Enhancements for Logic Brick Libraries
Circuit fabrics composed of highly regular structures, called logic bricks, have been described recently for improving yield. An automated logic brick design flow based on a SAT ...
Jason G. Brown, Brian Taylor, Ronald D. Blanton, L...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
13 years 9 months ago
Problems Due to Open Faults in the Interconnections of Self-Checking Data-Paths
In this work, the problem of open faults affecting the interconnections of SC circuits composed by data-path and control is analyzed. In particular, it is shown that, in case open...
Michele Favalli, Cecilia Metra