21 search results - page 2 / 5 » Buffer Insertion Considering Process Variation |
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
With the emerging process variations in fabrication, the traditional corner-based timing optimization techniques become prohibitive. Buffer insertion is a very useful technique fo...
DAC
2010
ACM
13 years 3 months ago
2010
ACM
Clock meshes are extremely effective at filtering clock skew from environmental and process variations. For this reason, clock meshes are used in most high performance designs. Ho...
ISVLSI
2008
IEEE
14 years 4 days ago
2008
IEEE
In nanometer regime, the effects of process variations are dominating circuit performance, power and reliability of circuits. Hence, it is important to properly manage variation e...
ICCD
2007
IEEE
14 years 2 months ago
2007
IEEE
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
As VLSI technology scales toward 65nm and beyond, both timing and power performance of integrated circuits are increasingly affected by process variations. In practice, people oft...