12 search results - page 1 / 3 » Bus Scheduling for TDL Components |
DAGSTUHL
2004
13 years 6 months ago
2004
This paper describes a solution for bus scheduling of distributed multi-mode TDL (Timing Definition Language) components. The TDL component model is based on the concept of Logical...
HPCA
2012
IEEE
12 years 25 days ago
2012
IEEE
Main memory latencies have always been a concern for system performance. Given that reads are on the critical path for CPU progress, reads must be prioritized over writes. However...
RTSS
2008
IEEE
13 years 11 months ago
2008
IEEE
This paper presents the design of user-level scheduling hierarchies in the Composite component-based system. The motivation for this is centered around the design of a system that...
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
This paper presents a way of encoding some kinds of dynamic reconfiguration behaviour in the interface portion of circuit descriptions. This has many advantages. The user of a rec...
DATE
2010
IEEE
13 years 10 months ago
2010
IEEE
—As Electronic Control Units (ECUs) and embedded software functions within an automobile keep increasing in number, the scale and complexity of automotive embedded systems is gro...