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DAC
1996
ACM
13 years 7 months ago
A Fast State Reduction Algorithm for Incompletely Specified Finite State Machines
Abstract-- This paper proposes a state reduction algorithm for incompletely specified FSMs. The algorithm is based on iterative improvements. When the number of compatibles is like...
Hiroyuki Higuchi, Yusuke Matsunaga
EURODAC
1990
IEEE
73views VHDL» more  EURODAC 1990»
13 years 7 months ago
A new method for the state reduction of incompletely specified finite sequential machines
Maria J. Avedillo, José M. Quintana, Jos&ea...
ASPDAC
2001
ACM
126views Hardware» more  ASPDAC 2001»
13 years 7 months ago
A new partitioning scheme for improvement of image computation
Abstract-- Image computation is the core operation for optimization and formal verification of sequential systems like controllers or protocols. State exploration techniques based ...
Christoph Meinel, Christian Stangier
FPL
1999
Springer
147views Hardware» more  FPL 1999»
13 years 8 months ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...