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» CHIPS: Custom Hardware Instruction Processor Synthesis
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TCAD
2008
118views more  TCAD 2008»
13 years 4 months ago
CHIPS: Custom Hardware Instruction Processor Synthesis
This paper describes an integer-linear-programming (ILP)-based system called Custom Hardware Instruction Processor Synthesis (CHIPS) that identifies custom instructions for critica...
Kubilay Atasu, Can C. Özturan, Günhan D&...
ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
13 years 8 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail
DATE
2006
IEEE
112views Hardware» more  DATE 2006»
13 years 10 months ago
Automating processor customisation: optimised memory access and resource sharing
We propose a novel methodology to generate Application Specific Instruction Processors (ASIPs) including custom instructions. Our implementation balances performance and area req...
Robert G. Dimond, Oskar Mencer, Wayne Luk
ERSA
2007
177views Hardware» more  ERSA 2007»
13 years 6 months ago
Energy-Aware System Synthesis for Reconfigurable Chip Multiprocessors
- Even though state-of-the-art FPGAs present new opportunities in exploring low-cost high-performance architectures for floating-point scientific applications, they also pose serio...
Xiaofang Wang, Sotirios G. Ziavras, Jie Hu
DAC
1999
ACM
14 years 5 months ago
Customized Instruction-Sets for Embedded Processors
It is generally believed that there will be little more variety in CPU architectures, and thus the design of Instruction-set Architectures (ISAs) will have no role in the future o...
Joseph A. Fisher