5 search results - page 1 / 1 » CMOS design of focal plane programmable array processors |
ESANN
2001
13 years 6 months ago
2001
ISCAS
2008
IEEE
13 years 11 months ago
2008
IEEE
— In this paper we present implementation and experimental results for a digital vision chip that operates in mixed asynchronous/synchronous mode. Mixed configuration benefits fr...
IPPS
1999
IEEE
13 years 9 months ago
1999
IEEE
Real-time image processing applications have tremendous computational workloads and I/O throughput requirements. Operation in mobile, portable devices poses stringent resource limi...
ISVLSI
2005
IEEE
13 years 10 months ago
2005
IEEE
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract- We present an architecture and VLSI implemen- Various strategies in the analysis of spatio-temporal dynamtation of a distributed neural interface and spatio-temporal ics ...