6 search results - page 1 / 2 » CROP: Fast and effective congestion refinement of placement |
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
Modern circuits become harder to route with the ever decreasing design features. Previous routability-driven placement techniques are usually tightly coupled with the underlying p...
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
Congestion estimation is an important issue for the success of the VLSI layout. Fast congestion estimation provides an efficient means to adjust the placement and wire planning. A...
ISVLSI
2007
IEEE
13 years 10 months ago
2007
IEEE
— Y -interconnects for VLSI chips are based on the use of global and semi-global wiring in only 0◦ , 60◦ , and 120◦ . Though X-interconnects are fast replacing the traditio...
DAC
2007
ACM
14 years 5 months ago
2007
ACM
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
ISQED
2007
IEEE
13 years 10 months ago
2007
IEEE
— Fast and accurate routing congestion estimation is essential for optimizations such as floorplanning, placement, buffering, and physical synthesis that need to avoid routing c...