869 search results - page 174 / 174 » Cache Architectures for Reconfigurable Hardware |
CF
2009
ACM
13 years 11 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
ECRTS
2010
IEEE
13 years 6 months ago
2010
IEEE
Embedded control systems with hard real-time constraints require that deadlines are met at all times or the system may malfunction with potentially catastrophic consequences. Sched...
TPDS
2008
13 years 4 months ago
2008
This paper presents the Mitosis framework, which is a combined hardware-software approach to speculative multithreading, even in the presence of frequent dependences among threads....
ACMSE
2004
ACM
13 years 10 months ago
2004
ACM
Modern processors include features such as deep pipelining, multilevel cache hierarchy, branch predictors, out of order execution engine, and advanced floating point and multimedi...