10 search results - page 2 / 2 » Cache Coherence on a Slotted Ring |
NOCS
2007
IEEE
13 years 11 months ago
2007
IEEE
The paper introduces Network-on-Chip (NoC) design methodology and low cost mechanisms for supporting efficient cache access and cache coherency in future high-performance Chip Mul...
SC
1995
ACM
13 years 8 months ago
1995
ACM
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
ISCA
2006
IEEE
13 years 10 months ago
2006
IEEE
A simple and low-cost approach to supporting snoopy cache coherence is to logically embed a unidirectional ring in the network of a multiprocessor, and use it to transfer snoop me...
IPPS
1996
IEEE
13 years 9 months ago
1996
IEEE
To expand the Scalable Coherent Interface's (SCI) capabilities so it can be used to efficiently handle sharing in systems of hundreds or even thousands of processors, the SCI...
ISCA
2010
IEEE
13 years 10 months ago
2010
IEEE
SIMD organizations amortize the area and power of fetch, decode, and issue logic across multiple processing units in order to maximize throughput for a given area and power budget...