12 search results - page 1 / 3 » Cache Injection on Bus Based Multiprocessors |
SRDS
1998
IEEE
13 years 8 months ago
1998
IEEE
Software-controlled cache prefetching and data forwarding are widely used techniques for tolerating memory latency in shared memory multiprocessors. However, some previous studies...
MAM
2002
13 years 4 months ago
2002
Bus-based shared memory multiprocessors with private caches and snooping write-invalidate cache coherence protocols are dominant form of small- to medium-scale parallel machines t...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Functional, instruction-based self-testing of microprocessors has recently emerged as an effective alternative or supplement to other testing approaches, and is progressively adop...
HPCA
1999
IEEE
13 years 8 months ago
1999
IEEE
Cache coherence protocols of current shared-memory multiprocessors are difficult to verify. Our previous work proposed an extension of Lamport's logical clocks for showing th...
ICPP
1991
IEEE
13 years 8 months ago
1991
IEEE
-- The Express Ring is a new architecture under investigation at the University of Southern California. Its main goal is to demonstrate that a slotted unidirectional ring with very...