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IEEEPACT
2009
IEEE
13 years 1 months ago
Cache Sharing Management for Performance Fairness in Chip Multiprocessors
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
Xing Zhou, Wenguang Chen, Weimin Zheng
IEEEPACT
2009
IEEE
13 years 10 months ago
SOS: A Software-Oriented Distributed Shared Cache Management Approach for Chip Multiprocessors
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
Lei Jin, Sangyeun Cho
HPCA
2007
IEEE
13 years 10 months ago
An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors
The significant speed-gap between processor and memory and the limited chip memory bandwidth make last-level cache performance crucial for future chip multiprocessors. To use the...
Haakon Dybdahl, Per Stenström
IISWC
2006
IEEE
13 years 9 months ago
Modeling Cache Sharing on Chip Multiprocessor Architectures
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
Pavlos Petoumenos, Georgios Keramidas, Håkan...
ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
13 years 9 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi