332 search results - page 3 / 67 » Cache Write Policies and Performance |
HPCA
1997
IEEE
13 years 10 months ago
1997
IEEE
Processors with write-through caches typically require a write buffer to hide the write latency to the next level of memory hierarchy and to reduce write traffic. A write buffer ...
INFOCOM
2006
IEEE
13 years 11 months ago
2006
IEEE
— In reliable multicast, data packets can be cached at some nodes such as repair servers for future possible retransmission in loss recovery schemes. How to cache packets to opti...
ICDCS
1999
IEEE
13 years 10 months ago
1999
IEEE
This work studies the interaction of Web proxy cache coherency and replacement policies using trace-driven simulations. We specifically examine the relative importance of each typ...
SAC
2009
ACM
14 years 16 days ago
2009
ACM
File systems make use of part of DRAM as the buffer cache to enhance its performance in traditional systems. In this paper, we consider the use of Non-Volatile RAM (NVRAM) as a w...
POS
1998
Springer
13 years 10 months ago
1998
Springer
Persistent programming languages manage volatile memory as a cache for stable storage, imposing a read barrier on operations that access the cache, and a write barrier on updates ...