332 search results - page 66 / 67 » Cache Write Policies and Performance |
GLOBECOM
2006
IEEE
14 years 7 days ago
2006
IEEE
— Emulating Output Queued (OQ) Switch with sustainable implementation cost and low fixed delay is always preferable in designing high performance routers. The SwitchMemory-Switch...
HPCA
2005
IEEE
14 years 6 months ago
2005
IEEE
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems ...
SIGCOMM
2009
ACM
14 years 21 days ago
2009
ACM
Application-independent Redundancy Elimination (RE), or identifying and removing repeated content from network transfers, has been used with great success for improving network pe...
ESAS
2007
Springer
14 years 11 days ago
2007
Springer
The problem of secure routing in mobile ad hoc networks is long-standing and has been extensively studied by researchers. Recently, techniques of aggregating signatures have been a...
HPCA
1998
IEEE
13 years 10 months ago
1998
IEEE
This paper describes PRISM, a distributed sharedmemory architecture that relies on a tightly integrated hardware and operating system design for scalable and reliable performance....