Sciweavers

5 search results - page 1 / 1
» Cache friendly sparse matrix-vector multiplication
Sort
View
CATA
2010
13 years 6 months ago
Utilizing Recursive Storage in Sparse Matrix-Vector Multiplication - Preliminary Considerations
Computations with sparse matrices on "multicore cache based" computers are affected by the irregularity of the problem at hand, and performance degrades easily. In this ...
Michele Martone, Salvatore Filippone, Salvatore Tu...
PPSC
1997
13 years 6 months ago
Improving Memory-System Performance of Sparse Matrix-Vector Multiplication
Sparse matrix-vector multiplication is an important kernel that often runs inefficiently on superscalar RISC processors. This paper describes techniques that increase instruction-...
Sivan Toledo
FPGA
2005
ACM
195views FPGA» more  FPGA 2005»
13 years 10 months ago
Sparse Matrix-Vector multiplication on FPGAs
Floating-point Sparse Matrix-Vector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices sig...
Ling Zhuo, Viktor K. Prasanna
CAP
2010
12 years 12 months ago
Cache friendly sparse matrix-vector multiplication
Sardar Anisul Haque, Shahadat Hossain, Marc Moreno...
IPPS
2007
IEEE
13 years 11 months ago
Memory Optimizations For Fast Power-Aware Sparse Computations
— We consider memory subsystem optimizations for improving the performance of sparse scientific computation while reducing the power consumed by the CPU and memory. We first co...
Konrad Malkowski, Padma Raghavan, Mary Jane Irwin