Sciweavers

118 search results - page 24 / 24
» Calculation of worst-case execution time for multicore proce...
Sort
View
ALGORITHMICA
2004
111views more  ALGORITHMICA 2004»
13 years 4 months ago
Non-Clairvoyant Scheduling for Minimizing Mean Slowdown
We consider the problem of scheduling dynamically arriving jobs in a non-clairvoyant setting, that is, when the size of a job in remains unknown until the job finishes execution. ...
Nikhil Bansal, Kedar Dhamdhere, Jochen Könema...
ISCA
1996
IEEE
126views Hardware» more  ISCA 1996»
13 years 9 months ago
Memory Bandwidth Limitations of Future Microprocessors
This paper makes the case that pin bandwidth will be a critical consideration for future microprocessors. We show that many of the techniques used to tolerate growing memory laten...
Doug Burger, James R. Goodman, Alain Kägi
CODES
2007
IEEE
13 years 11 months ago
HW/SW co-design for Esterel processing
We present a co-synthesis approach that accelerates reactive software processing by moving the calculation of complex expressions into external combinational hardware. The startin...
Sascha Gädtke, Claus Traulsen, Reinhard von H...