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» Candidate One-Way Functions Based on Expander Graphs
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VMCAI
2010
Springer
14 years 2 months ago
Building a Calculus of Data Structures
Abstract. Techniques such as verification condition generation, preditraction, and expressive type systems reduce software verification to proving formulas in expressive logics. Pr...
Viktor Kuncak, Ruzica Piskac, Philippe Suter, Thom...
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
14 years 1 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson