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» Characterisation of FPGA Clock Variability
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ISVLSI
2008
IEEE
156views VLSI» more  ISVLSI 2008»
8 years 10 months ago
Characterisation of FPGA Clock Variability
As integrated circuits are scaled down it becomes dif´Čücult to maintain uniformity in process parameters across each individual die. The resulting performance variation requires ...
N. Pete Sedcole, Justin S. Wong, Peter Y. K. Cheun...
FPL
2006
Springer
140views Hardware» more  FPL 2006»
8 years 7 months ago
Architectural Modifications to Improve Floating-Point Unit Efficiency in FPGAs
FPGAs have reached densities that can implement floatingpoint applications, but floating-point operations still require a large amount of FPGA resources. One major component of IE...
Michael J. Beauchamp, Scott Hauck, Keith D. Underw...
FPGA
2008
ACM
184views FPGA» more  FPGA 2008»
8 years 5 months ago
Mapping for better than worst-case delays in LUT-based FPGA designs
Current advances in chip design and manufacturing have allowed IC manufacturing to approach the nanometer range. As the feature size scales down, greater variability is experience...
Kirill Minkovich, Jason Cong
TVLSI
2008
149views more  TVLSI 2008»
8 years 3 months ago
Architectural Modifications to Enhance the Floating-Point Performance of FPGAs
With the density of FPGAs steadily increasing, FPGAs have reached the point where they are capable of implementing complex floating-point applications. However, their general-purpo...
Michael J. Beauchamp, Scott Hauck, Keith D. Underw...
FPL
2003
Springer
119views Hardware» more  FPL 2003»
8 years 8 months ago
Hardware Implementations of Real-Time Reconfigurable WSAT Variants
Local search methods such as WSAT have proven to be successful for solving SAT problems. In this paper, we propose two host-FPGA (Field Programmable Gate Array) co-implementations,...
Roland H. C. Yap, Stella Z. Q. Wang, Martin Henz
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