Sciweavers

5 search results - page 1 / 1
» Characteristic faults and spectral information for logic BIS...
Sort
View
ICCAD
2002
IEEE
107views Hardware» more  ICCAD 2002»
14 years 1 months ago
Characteristic faults and spectral information for logic BIST
We present a new method of built-in-self-test (BIST) for sequential circuits and system-on-a-chip (SOC) using characteristic faults and circuitspecific spectral information in th...
Xiaoding Chen, Michael S. Hsiao
ITC
1998
IEEE
114views Hardware» more  ITC 1998»
13 years 9 months ago
BETSY: synthesizing circuits for a specified BIST environment
This paper presents a logic synthesis tool called BETSY (BIST Environment Testable Synthesis) for synthesizing circuits that achieve complete (100%)fault coverage in a user specif...
Zhe Zhao, Bahram Pouya, Nur A. Touba
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
13 years 10 months ago
BISD: Scan-based Built-In self-diagnosis
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...
Melanie Elm, Hans-Joachim Wunderlich
ECIS
2003
13 years 6 months ago
Development of a security methodology for cooperative information systems: the cooPSIS project
Since networks and computing systems are vital components of today's life, it is of utmost importance to endow them with the capability to survive physical and logical faults...
Mariagrazia Fugini, Mario Mezzanzanica
HPCA
2008
IEEE
14 years 5 months ago
Regional congestion awareness for load balance in networks-on-chip
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use...
Paul Gratz, Boris Grot, Stephen W. Keckler