Sciweavers

200 search results - page 40 / 40
» Characterizing embedded applications for instruction-set ext...
Sort
View
EMSOFT
2008
Springer
13 years 6 months ago
Tax-and-spend: democratic scheduling for real-time garbage collection
Real-time Garbage Collection (RTGC) has recently advanced to the point where it is being used in production for financial trading, military command-and-control, and telecommunicat...
Joshua S. Auerbach, David F. Bacon, Perry Cheng, D...
RTSS
2007
IEEE
13 years 11 months ago
ANDES: An ANalysis-Based DEsign Tool for Wireless Sensor Networks
— We have developed an analysis-based design tool, ANDES, for modeling a wireless sensor network system and analyzing its performance before deployment. ANDES enables designers t...
Vibha Prasad, Ting Yan, Praveen Jayachandran, Zeng...
MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
13 years 11 months ago
Finding concurrency bugs with context-aware communication graphs
Incorrect thread synchronization often leads to concurrency bugs that manifest nondeterministically and are difficult to detect and fix. Past work on detecting concurrency bugs ...
Brandon Lucia, Luis Ceze
ECRTS
2005
IEEE
13 years 10 months ago
Cache Contents Selection for Statically-Locked Instruction Caches: An Algorithm Comparison
Cache memories have been extensively used to bridge the gap between high speed processors and relatively slower main memories. However, they are sources of predictability problems...
Antonio Martí Campoy, Isabelle Puaut, Angel...
MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
13 years 10 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...