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» Checking satisfiability of a conjunction of BDDs
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CAV
2000
Springer
187views Hardware» more  CAV 2000»
13 years 9 months ago
Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking
In this paper we show how to do symbolic model checking using Boolean Expression Diagrams (BEDs), a non-canonical representation for Boolean formulas, instead of Binary Decision Di...
Poul Frederick Williams, Armin Biere, Edmund M. Cl...
TABLEAUX
1998
Springer
13 years 10 months ago
Model Checking: Historical Perspective and Example (Extended Abstract)
ple (Extended Abstract) Edmund M. Clarke and Sergey Berezin Carnegie Mellon University -- USA Model checking is an automatic verification technique for finite state concurrent syst...
Edmund M. Clarke, Sergey Berezin
ICCAD
2002
IEEE
176views Hardware» more  ICCAD 2002»
14 years 2 months ago
High capacity and automatic functional extraction tool for industrial VLSI circuit designs
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
Sasha Novakovsky, Shy Shyman, Ziyad Hanna
ENTCS
2008
110views more  ENTCS 2008»
13 years 5 months ago
A New Proposal Of Quasi-Solved Form For Equality Constraint Solving
Most well-known algorithms for equational solving are based on quantifier elimination. This technique iteratively eliminates the innermost block of existential/universal quantifie...
Javier Álvez, Paqui Lucio
ECAI
2008
Springer
13 years 7 months ago
Vivifying Propositional Clausal Formulae
Abstract. In this paper, we present a new way to preprocess Boolean formulae in Conjunctive Normal Form (CNF). In contrast to most of the current pre-processing techniques, our app...
Cédric Piette, Youssef Hamadi, Lakhdar Sais