105 search results - page 4 / 21 » Checkpointing alternatives for high performance, power-aware... |
ISCA
2012
IEEE
11 years 7 months ago
2012
IEEE
Hybrid processors are HW/SW co-designed processors that leverage blocked-execution, the execution of regions of instructions as atomic blocks, to facilitate aggressive speculative...
ISCA
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper presents a high-availability system architecture called INDRA — an INtegrated framework for Dependable and Revivable Architecture that enhances a multicore processor ...
ICPP
2003
IEEE
13 years 10 months ago
2003
IEEE
Multicast is an important collective operation for parallel programs. Some Network Interface Cards (NICs), such as Myrinet, have programmable processors that can be programmed to ...
SIGMOD
2007
ACM
14 years 5 months ago
2007
ACM
Suppose a long-running analytical query is executing on a database server and has been allocated a large amount of physical memory. A high-priority task comes in and we need to ru...
CSREAESA
2006
13 years 6 months ago
2006
: The explosive growth of internet traffic and the increasing complexity of the functions performed by network nodes have given rise to a new breed of programmable micro-processors...