52 search results - page 1 / 11 » ChipViz : Visualizing Memory Chip Test Data |
ISVC
2007
Springer
13 years 11 months ago
2007
Springer
This paper presents a technique that allows test engineers to visually analyze and explore within memory chip test data. We represent the test results from a generation of chips al...
ET
2002
13 years 4 months ago
2002
Abstract. A novel approach for using an embedded processor to aid in deterministic testing of the other components of a system-on-a-chip (SOC) is presented. The tester loads a prog...
EUROPAR
2003
Springer
13 years 10 months ago
2003
Springer
As compared to a complex single processor based system, on-chip multiprocessors are less complex, more power efficient, and easier to test and validate. In this work, we focus on a...
DAC
1999
ACM
13 years 9 months ago
1999
ACM
The purpose of this paper is to develop a exible design for test methodology for testing a core-based system on chip SOC . The novel feature of the approach is the use an embedde...
VLSI
2005
Springer
13 years 10 months ago
2005
Springer
1 The increasing test data volume required to ensure high test quality when testing a System-on-Chip is becoming a problem since it (the test data volume) must fit the ATE (Automa...